D-MAX DMC-20SEC Manual de usuario descargar pdf (Pagina 8)

8

Macro Sensors Tel. (856) 662-8000

11 May, 2006 DMC-A2 Series (ALD-00029)

www.macrosensors.com

+

SIGNAL 1

— EXC

+

EXC

SHIELD

GND

—

SIGNAL 1

+

SIGNAL 2

—

SIGNAL 2

LVDT 2

LVDT 1

+

24 V

34

PIN 1

PIN 2

PIN 3

PIN 4

PIN 5

PIN 6

PIN 7

PIN 8

PIN 9

PIN 10

PIN 11

NC

NC

Figure 2 – Example Connection Configured for Dual LVDT Inputs

Configured for dual input LVDTs.

Figure 1 – LVDT Smart Input Module Functional Schematic

Table 1: ISL1 11-pin I/O Connector

Pin Description Function

1

2

3

4

5

6

7

8

9

10

11

+Signal 1

–Signal 1

–EXC

+EXC

+Signal 2

–Signal 2

+24 V

NC

NC

Ground

Shield

LVDT 1 input signal +

LVDT 1 input signal –

Dual LVDT excitation sine wave

(1-11 kHz).

LVDT 2 input signal +

LVDT 2 input signal –

Excitation voltage +24 V, 150 mA.

Not used.

Not used.

0 V.

Cable shield, 3 V common mode.

LVDT 2

LVDT 1

— 5 V

GND

GND

+

5 V

+

24 V

+

SIGNAL 1

—

SIGNAL 1

+

SIGNAL 2

—

SIGNAL 2

SHIELD

3 V RMS

+

EXC

—

EXC

+

24V

Synchronous

Demodulator

500 Hz

LPF

500 Hz

LPF

CH1

CH2

PCB 345

Interface

I

2

C Bus

16 Programmable

Excitation Frequencies

Dual

Channel

16-Bit

ATD

Micro-

controller

Audio

Sine wave

Generator

SP5

SP6

N C

N C

Technical Description

This input is a smart input module

designed to drive and condition the

signals from two LVDT transducers. The

module contains two high-speed

microcontrollers and a SD 16-bit dual

channel A/D convertor. It communicates

with the selected controller via the I

2

C

data bus. One of the microcontrollers

generates the sine wave for the LVDT

excitation frequency. These frequencies

are produced as multiples of the line

frequency (either 50 Hz or 60 Hz). Up to

16 frequencies are available and are

selected using the controller setup. The

output to the primary coil of both LVDTs is

a 3 V RMS sine wave. The received LVDT

signals are synchronously demodulated

and filtered to remove the carrier

frequency. The Σ Δ 16-bit A/D convertor

has over 130 dB noise rejection at the

excitation frequencies and is capable of

40 Hz averaged output on 45 samples.

Two open collector NPN transistors (SP5

and SP6) are available as high-speed

controlled outputs.

Input Signal Setup Procedures

Example Connection Diagram

1 2 3 4 5 6 7 8 9 10 11 12 13 ... 27 28

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